Ub
Anti-PLL
Every top edge shows its side colour on top; read the permutation from the top stickers as for PLL.
Your status
Algorithms (4)
y2 R U R' U M' U' R U' r' U2 M' U' M
My choice
16 HTM · 13 STM · 17 QTM
3-gen
rotation
oh
<U,R,M>
SpeedCubeDB, 3 votes
y S U2 R U R' U' R' U' S' R' U R
14 HTM · 12 STM · 15 QTM
3-gen
rotation
<U,R,S>
SpeedCubeDB, 1 votes
y2 f' L' U' L U f L U L F' L' F U' L'
14 HTM · 14 STM · 14 QTM
3-gen
rotation
<U,F,L>
SpeedCubeDB, 0 votes
U' M U' M' U2 r' U' R U' M' U R' U R
17 HTM · 14 STM · 18 QTM
3-gen
rotationless
oh
<U,R,M>
SpeedCubeDB, 0 votes
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: R' U' R U' M U R' U r U2' M U M' U. Every algorithm above was run by our logic engine from that state and reaches "pll-solved", keeping f2l.