H
Anti-PLL
Every top edge shows its side colour on top; read the permutation from the top stickers as for PLL.
Your status
Algorithms (4)
r U R' U' M2 U R U' R' U' M'
My choice
13 HTM · 11 STM · 15 QTM
3-gen
rotationless
oh
<U,R,M>
SpeedCubeDB, 6 votes
S R' U' R U R U R U' R' S'
13 HTM · 11 STM · 13 QTM
3-gen
rotationless
<U,R,S>
SpeedCubeDB, 4 votes
M U R U R' U' M2 U R U' r'
13 HTM · 11 STM · 15 QTM
3-gen
rotationless
oh
<U,R,M>
SpeedCubeDB, 1 votes
S' R U R' S U' M' U R U' r'
14 HTM · 11 STM · 14 QTM
rotationless
<U,R,M,S>
SpeedCubeDB, 1 votes
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: r U R' U' M2' U R U' R' U' M'. Every algorithm above was run by our logic engine from that state and reaches "pll-solved", keeping f2l.