Ab
Anti-PLL
Every top edge shows its side colour on top; read the permutation from the top stickers as for PLL.
Your status
Algorithms (4)
R U R' U R U' R' U R U R2 D' r U' r' D R2 U R'
My choice
19 HTM · 19 STM · 21 QTM
3-gen
rotationless
<U,R,D>
SpeedCubeDB, 2 votes
y2 M R U' L U2 R' U r U2 r' L' U M'
15 HTM · 13 STM · 17 QTM
rotation
<U,R,L,M>
SpeedCubeDB, 1 votes
R' L2 F' R F2 L' F R U2 R2 F R L'
13 HTM · 13 STM · 17 QTM
rotationless
<U,R,F,L>
SpeedCubeDB, 0 votes
M' U L' r' U2 r U R' U2 L U' r' R2
14 HTM · 13 STM · 17 QTM
rotationless
<U,R,L,M>
SpeedCubeDB, 0 votes
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: L R' F' R2' U2' R' F' L F2' R' F L2' R. Every algorithm above was run by our logic engine from that state and reaches "pll-solved", keeping f2l.