WV 4
WV
With the pair ready for R U R', look at which way each last-layer corner's top colour faces.
Your status
Algorithms (4)
U R2 D R' U' R D' R2
My choice
8 HTM · 8 STM · 10 QTM
3-gen
rotationless
<U,R,D>
SpeedCubeDB, 15 votes
U2 R' D' R U' R' D R2 U' R'
10 HTM · 10 STM · 12 QTM
3-gen
rotationless
<U,R,D>
SpeedCubeDB, 4 votes
U2 R U' R' L' U2 R U R' U2 L
11 HTM · 11 STM · 14 QTM
3-gen
rotationless
<U,R,L>
SpeedCubeDB, 1 votes
U R U R' U' R U' R2 U2 R U R' U R
14 HTM · 14 STM · 16 QTM
2-gen
rotationless
oh
<U,R>
SpeedCubeDB, 1 votes
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: R2' D R' U R D' R2' U'. Every algorithm above was run by our logic engine from that state and reaches "f2l-oll".