WV 1
WV
With the pair ready for R U R', look at which way each last-layer corner's top colour faces.
Your status
Algorithms (4)
U L' U2 R U R' U2 L
My choice
8 HTM · 8 STM · 10 QTM
3-gen
rotationless
<U,R,L>
SpeedCubeDB, 34 votes
L' U2 R U2 R' U2 L
7 HTM · 7 STM · 10 QTM
3-gen
rotationless
<U,R,L>
SpeedCubeDB, 8 votes
f' L U L' U' L' f
7 HTM · 7 STM · 7 QTM
3-gen
rotationless
<U,F,L>
SpeedCubeDB, 6 votes
U R' D' R U R' D R U' R U' R'
12 HTM · 12 STM · 12 QTM
3-gen
rotationless
<U,R,D>
SpeedCubeDB, 6 votes
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: L' U2' R U' R' U2' L U'. Every algorithm above was run by our logic engine from that state and reaches "f2l-oll".