SV 1
SV
With the pair ready for R U' R', look at which way each last-layer corner's top colour faces.
Your status
Algorithms (4)
U2 R' D' r U2 r' D R
My choice
8 HTM · 8 STM · 10 QTM
3-gen
rotationless
<U,R,D>
SpeedCubeDB, 6 votes
L R U' R' U L' U2 R U' R'
10 HTM · 10 STM · 11 QTM
3-gen
rotationless
<U,R,L>
SpeedCubeDB, 4 votes
U2 R U R' U2 L U' R U R' L'
11 HTM · 11 STM · 13 QTM
3-gen
rotationless
<U,R,L>
SpeedCubeDB, 2 votes
R U R D R' U2 R D' R' U2 R'
11 HTM · 11 STM · 13 QTM
3-gen
rotationless
<U,R,D>
SpeedCubeDB, 1 votes
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: R U R' U2' L U' R U R' L'. Every algorithm above was run by our logic engine from that state and reaches "f2l-oll".