AVLS UFR16
AVLS
With the corner above its slot, read which way each top corner's yellow faces.
Your status
Algorithms (11)
(U') first, then:
B' U' B U R U2 B' U2 B R'
My choice
10 HTM · 10 STM · 12 QTM
3-gen
rotationless
<U,R,B>
One hand: needs L, B, S or E
Do U' first (AUF) on the case as drawn. · Cubemuch
(U2) first, then:
L' U' L U2 R U L' U2 L U R'
11 HTM · 11 STM · 13 QTM
3-gen
rotationless
<U,R,L>
One hand: needs L, B, S or E
Do U2 first (AUF) on the case as drawn. · Cubemuch
F' L U2 B L' B' U2 F' L' F2
10 HTM · 10 STM · 13 QTM
rotationless
<U,F,L,B>
One hand: needs L, B, S or E
Cubemuch
(U) first, then:
F' U' F U2 F' U2 F U2 F' U' F
11 HTM · 11 STM · 14 QTM
2-gen
rotationless
<U,F>
One hand: R, U and M with F or D
Do U first (AUF) on the case as drawn. · Cubemuch
(U) first, then:
y L' U' L U2 L' U2 L U2 L' U' L
11 HTM · 11 STM · 14 QTM
2-gen
rotation
<U,L>
One hand: needs L, B, S or E
Do U first (AUF) on the case as drawn. · Cubemuch
(U) first, then:
y' R' U' R U2 R' U2 R U2 R' U' R
11 HTM · 11 STM · 14 QTM
2-gen
rotation
oh
<U,R>
One hand: R and U only
Do U first (AUF) on the case as drawn. · Cubemuch
(U') first, then:
R U' R' U R U R' U R U R' U' R U' R'
15 HTM · 15 STM · 15 QTM
2-gen
rotationless
oh
<U,R>
One hand: R and U only
Do U' first (AUF) on the case as drawn. · Cubemuch
(U2) first, then:
x U' B U2 B2 U2 B' U2 B' U2 B' U
11 HTM · 11 STM · 16 QTM
2-gen
rotation
<U,B>
One hand: needs L, B, S or E
Do U2 first (AUF) on the case as drawn. · Cubemuch
R2 U2 R U' R2 U R' U2 R' U R'
11 HTM · 11 STM · 15 QTM
2-gen
rotationless
oh
<U,R>
One hand: R and U only
Cubemuch
(U2) first, then:
y' Lw' B' Lw U B' Lw' U Lw' B' Lw' U Lw'
12 HTM · 12 STM · 12 QTM
3-gen
rotation
<U,L,B>
One hand: needs L, B, S or E
Do U2 first (AUF) on the case as drawn. · Cubemuch
y Rw' U x U2 y2 Rw U' Rw' y2 U2 Rw' U' Rw2
10 HTM · 10 STM · 13 QTM
2-gen
rotation
oh
<U,R>
One hand: R and U only
Cubemuch
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: R U' L' U2 L U' R' U2 L' U L U2. Every algorithm above was run by our logic engine from that state and reaches "f2l-oll".