Ga
Anti-PLL
Every top edge shows its side colour on top; read the permutation from the top stickers as for PLL.
Your status
Algorithms (4)
y R U2 R' F R' F' R2 U2 R' F R U' R' U' R U R' F'
My choice
18 HTM · 18 STM · 21 QTM
3-gen
rotation
<U,R,F>
SpeedCubeDB, 1 votes
U' R' D' r U' r' D R2 U R' U' F' U2 F
14 HTM · 14 STM · 16 QTM
rotationless
<U,R,F,D>
SpeedCubeDB, 0 votes
L' U2 L F' L F L2 U2 L F' L F L' U' L' U L
17 HTM · 17 STM · 20 QTM
3-gen
rotationless
<U,F,L>
SpeedCubeDB, 0 votes
y' R' D' r U' r' D R2 U R' U' F' U2 F
13 HTM · 13 STM · 15 QTM
rotation
<U,R,F,D>
SpeedCubeDB, 0 votes
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: F' U2' F U R U' R2' D' r U r' D R U. Every algorithm above was run by our logic engine from that state and reaches "pll-solved", keeping f2l.