1LLL 56 8
1LLL
OLL 56
Recognise the OLL case, then the permutation as for ZBLL.
Your status
Algorithms (4)
F R' F' R2 U2 F R2 U R U' R2 F' U R'
My choice
14 HTM · 14 STM · 18 QTM
3-gen
rotationless
<U,R,F>
SpeedCubeDB, 1 votes
y R U2 R' U' R U R' U' y r' U' R' F' R U r
15 HTM · 15 STM · 16 QTM
3-gen
rotation
<U,R,F>
SpeedCubeDB, 0 votes
R U R2 u R U R' E R U R2 E' R U2 R' u' R
19 HTM · 17 STM · 22 QTM
3-gen
rotationless
<U,R,E>
SpeedCubeDB, 0 votes
y R U2 R' U' R U R' d' r' U' R' F' R U r
15 HTM · 15 STM · 16 QTM
rotation
<U,R,F,D>
SpeedCubeDB, 0 votes
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: r' U' R' F R U r y' U R U' R' U R U2' R' y'. Every algorithm above was run by our logic engine from that state and reaches "pll-solved", keeping f2l.