1LLL 46 14
1LLL
OLL 46
Recognise the OLL case, then the permutation as for ZBLL.
Your status
Algorithms (4)
F U R' U' F' U R U R U' R'
My choice
11 HTM · 11 STM · 11 QTM
3-gen
rotationless
<U,R,F>
SpeedCubeDB, 0 votes
y R U R B' R' B U' R'
8 HTM · 8 STM · 8 QTM
3-gen
rotation
<U,R,B>
SpeedCubeDB, 0 votes
U' L U L F' L' F U' L'
9 HTM · 9 STM · 9 QTM
3-gen
rotationless
<U,F,L>
SpeedCubeDB, 0 votes
y2 F R U R' U' F' U' R U R' U R U2 R'
14 HTM · 14 STM · 15 QTM
3-gen
rotation
<U,R,F>
SpeedCubeDB, 0 votes
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: R U R' U' R' U' F U R U' F'. Every algorithm above was run by our logic engine from that state and reaches "pll-solved", keeping f2l.