1LLL 40 12
1LLL
OLL 40
Recognise the OLL case, then the permutation as for ZBLL.
Your status
Algorithms (2)
R U' R' F' r' F' r U' r' F r F R U R'
My choice
15 HTM · 15 STM · 15 QTM
3-gen
rotationless
<U,R,F>
SpeedCubeDB, 0 votes
R U' R' F' L' U' L U' L' U L F R U R'
15 HTM · 15 STM · 15 QTM
rotationless
<U,R,F,L>
SpeedCubeDB, 0 votes
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: R U' R' F' r' F' r U r' F r F R U R'. Every algorithm above was run by our logic engine from that state and reaches "pll-solved", keeping f2l.